Toshiba America Electronic Components, Inc. (TAEC)* today announced the introduction of a new 32-bit single-chip MIPS-based(TM) reduced instruction set computer (RISC) microcontroller (MCU) family. Designated TX19A70, the new devices provide simultaneous vector motor control of inverter motors and application control for air conditioner, washing machine and refrigerator applications. Samples of the flash memory versions, TMP19A70FYFG and TMP19A70FYUG, are scheduled to be available in June 2004. ROM code acceptance for the mask ROM versions, TMP19A70CYFG and TMP19A70CYUG, is scheduled to start in July 2004.
“Energy conservation is increasingly important in the home electric appliances industry and an increasing number of products use high-efficiency vector control to drive air conditioner compressors, washing machines and refrigerators,” said Don Schneider, business development manager of the ASSP Business Unit at TAEC. “Correspondingly, there is increasing need for a microcontroller that provides the right combination of vector drive, application control, high-speed processing and high-speed analog-to-digital (A/D) conversion. Toshiba designed the new TX19A70 family to meet this market need; it joins the company’s growing product portfolio targeted at the home appliance segment.” He noted that a major Japanese company has already designed the device into an air conditioner.
Based on the MIPS(R) R3000A architecture of MIPS Technologies, Inc., the new family features a newly developed, high-performance 32-bit RISC TX19A core and includes both the 32-bit MIPS32(R) instruction-set architecture (ISA) for speed and the MIPS16e(TM) Application-Specific Extensions (ASE), an instruction set with high-code-efficiency which contains instructions added by Toshiba. Most instructions can be executed in a single cycle of 17.8 nanoseconds (ns.) Each execution unit (32-bit ALU, 32-bit MAC, 32-bit Shift) can execute an instruction in a single cycle. For three-phase PWM output, the MCUs have a 16-bit width with a minimum time unit of 35.7ns, a dead timer, and an emergency shutdown protection function. The built-in A/D converter uses sequential conversion and can perform 2.36 microsecond conversion with 10-bit resolution. Also, these devices incorporate a variety of automatic conversion start functions that are synchronous to the PWM.
Key Features
Key features of the MCUs are as follows:
* Feature a newly developed high-performance 32-bit RISC TX19A core. The instruction set includes as subsets the 32-bit instructions of the MIPS32 ISA for high-performance and the MIPS16e ASE for high-code-density. High-speed memory and 5-stage pipelines enable the execution of most instructions in a single cycle of 17.8ns.
* By multiplying the frequency of an external 7MHz oscillator by a factor of 8 (56 MHz), 1-cycle instructions can be executed in 7.8ns.
* Can select a 32-bit or 16-bit fixed length for instructions depending on the mode. Can switch to a 32-bit length when fast operation is required or to a 16-bit length when code efficiency is desired.
* Incorporates the three following independent execution units. Saving the execution results is not necessary. Also, all operations are executed in a single cycle.
* 32-bit arithmetic operation, logic operation (ALU) * 32-bit multiply accumulation operation (MAC): 32×32 + 32 = 64 bits * 32-bit shifter: 32 bits –> 32 bits
* Features a built-in 2-channel, 3-phase PWM output with a dead timer for motor control. Has a 16-bit up/down counter and can generate a PWM carrier frequency with a minimum resolution of 35.7ns. Also, EMG signal input makes emergency output shutdown possible.
* Employs two 10-bit sequential conversion type A/D converters to achieve a conversion time of 2.36 microseconds. The A/D converters can synchronize with the PWM or a timer and can start A/D conversion at any location in the PWM output.
* Incorporates a 1-channel encoder counter that enables easy detection of the motor position by using an encoder.
Pricing and Availability
Samples of the flash memory versions, TMP19A70FYFG and TMP19A70FYUG, are scheduled to be available in June 2004; sample pricing is planned to be $18.15 each in 100-piece quantities. ROM code acceptance for the mask ROM versions, TMP19A70CYFG and TMP19A70CYUG, is scheduled to start in July 2004; contact TAEC for pricing. Volume production of the four-product family is slated to start in August 2004.